This circuit will buffer the OCXO's output and feed it through a power divider so it can go both to the final output distribution board and the phase-locked loop controls.  It's a low noise circuit that will compensate for power divider losses and isolate the oscillator from downstream noise.

I'm experimenting with circuits designed by KO4BB and adapting them to my needs.

First, let's prototype it on the breadboard and take some initial measurements.  Since this is a single-frequency application, we'll use the HP 8648B signal generator as the source and measure the output with the Rigol DSA815-TG spectrum analyzer.

The signal generator and spectrum analyzer are both synced to a Racal Dana 1992 universal counter that has an OCXO time base which I already know is accurate to better than 3 parts per billion.

Breadboard Prototype
Breadboard Prototype
(click for a large view)
Signal Generator
Signal Generator
(click for a large view)
Spectrum Analyzer
Spectrum Analyzer
(click for a large view)
Power Supply
Power Supply
(click for a large view)

Prototyping breadboards are not good for RF work, but at 10 MHz, it's good enough to validate the initial circuit.  With the signal generator set to +5.9 dBm (to simulate the OCXO), the gain measures out at +11.5 dB and power consumption at 12V is 45.2 mA.

Unfortunately, there was a large amount of intermittent harmonic distortion which was traced to poor contacts within the breadboard.  Also, the first transformer that I wound was less than ideal.  So the next steps are to wind a better transformer and solder the components together on copper-clad protoboard.

The rewound transformer has 12 turns of #24 wire for the primary and 52 turns of #26 for the secondary on a T80-2 core.  I was going for absolute inductance (1 μH and 18 μH) rather than turns ratio.  Coupling coefficient is good at about 94.7%.  In the near future, I want to try it again targeting the turns ratio.

Now for the rebuilt and improved circuit:

Amplifier Prototype #2
Amplifier Prototype #2
(click for a large view)

It could stand to have a little better ground plane, but in testing, I discovered I can get cleaner measurements by wrapping the board with plastic, then encasing it in a cocoon of aluminum foil for shielding.  The final circuit will probably be built into an aluminum housing similar to my power splitter experiment.

When testing it on the AIM-4170C network analyzer with a 50 ohm SMA terminator as the load, the input shows just a little mismatch at the 10 MHz frequency of interest.  It doesn't like 38 MHz at all when powered.  Unpowered, the anomaly at 38 MHz goes away, so I'm thinking that's some oscillation in the transistors.  In any case, it doesn't much matter for this application.

One interesting discovery is that the circuit is much cleaner with a 5V or 9V supply than the designed 12 volt supply.  I tested at common regulator voltages of 3.3, 5, 9 and 12V.  Here are the gain figures on the fundamental and 2nd & 3rd harmonics:

Gain vs Supply Voltage
Gain vs Supply Voltage
Input Impedance vs Frequency
Input Impedance vs Frequency
(click for a full view)
Gain @ 10 MHz
Gain @ 10 MHz
(click for a full view)

So there's more work and testing to be done, but it's looking pretty good so far!

Add comment


Security code
Refresh